Courses
CMOS
VLSI
DSP
Low Power Design
Data Communication Networks
Image Processing
Technology of Semiconductor Fabrications
Courses
Design of ASIC and FPGA Systems
Computer Architecture
Logic Circuit analysis and design
Digital Systems Test and Testability
Engineering Statistics and Probability
Microprocessors
Digital Telecommunication Systems
Analog Electronics
University of Kurdistan
Awarded for achieving the highest academic standing in the Master of Science in Electronics Engineering program.
University of Kurdistan
Recognized for outstanding academic performance, ranking third in the Bachelor of Science in Electronics Engineering program.
IACR TCHES
Co-authored a paper on the correct application of time-shared masking in round-based designs, advancing cryptographic security.
FITEE
Co-authored a paper on cluster-based BIST for enhanced inter-layer via fault coverage, improving fault detection in 3D ICs.
DATE2025
Co-authored a paper exploring further motivations for using evaluation tools in hardware multiplicative masking of AES, with accompanying repository and paper.
iicm2023
Co-authored a paper introducing a novel approach for application-dependent testing of FPGA interconnects.
ESWA
Authored a paper detailing an evolutionary approach for implementing logic circuits on three-dimensional FPGAs.
ISEE
Authored a paper on a SA-based approach for implementing digital systems on 3D Integrated Circuits.
ISES2020
Authored a paper on the implementation of digital circuits on three-dimensional FPGAs using Simulated Annealing.
Sanandaj, Kurdistan, Iran
Summary
Instructing undergraduate electrical engineering courses.
Research Assistant
Darmstadt, Hesse, Germany
Summary
Led advanced research in low-latency cryptographic designs and developed robust hardware countermeasures against physical side-channel attacks.
Highlights
Conducted cutting-edge research on low-latency cryptographic designs, enhancing security and performance for critical applications.
Developed and implemented hardware countermeasures, effectively mitigating physical side-channel attacks at ImpSec Group.
Co-authored two peer-reviewed papers (first author), contributing to advancements in secure and reliable digital systems research.
Lecturer & Research Assistant
Kurdistan, Kurdistan, Iran
Summary
Instructed undergraduate electrical engineering courses and spearheaded research initiatives in digital design and 3D FPGAs.
Highlights
Lectured undergraduate courses including Computer Architecture, Logic Circuits, and Digital Systems Design, delivering foundational knowledge to engineering students.
Led impactful research in hardware design, resulting in 5 publications in conferences and journals.
Mentored and guided numerous students in complex digital design projects, fostering hands-on experience and academic growth.
Teaching Assistant
Kurdistan, Kurdistan, Iran
Summary
Supported instruction for over 10 core electrical engineering courses, facilitating student learning and practical skill development.
Highlights
Assisted in teaching over 10 core electrical engineering courses, including ASIC/FPGA Design, C++ Programming, and VLSI.
Provided direct support to students, clarifying complex concepts and guiding practical exercises to enhance comprehension and application.
Contributed to the development of course materials and lab sessions, improving the learning experience for undergraduate students.
Data Center Intern
Kurdistan, Kurdistan, Iran
Summary
Analyzed and optimized the performance of critical central equipment within a data center environment.
Highlights
Examined the performance of central equipment at high temperatures, identifying key areas for operational improvement and reliability.
Proposed and evaluated solutions to address temperature-related performance issues, enhancing system longevity.
Gained practical experience in data center operations and critical infrastructure management, contributing to system stability.
Low-power digital design, Hardware-algorithm co-design, Design-for-test, Architectural challenges in 3D ICs.
Post-Quantum Cryptography, Implementation security, Side-channel analysis, Lightweight and efficient cipher architectures.
RISC-V for SNN acceleration, Memristive and emerging devices, Energy-efficient edge AI systems.
Summary
Implemented and verified a RV32I core using Verilog-HDL, ensuring functional correctness with industry tools.
Summary
Executed a complete RTL-to-GDSII implementation of a round-based full PRINCE cipher using industry-standard tools.
Summary
Designed and verified a parameterizable 3D convolution core with automated functional verification using MATLAB co-simulation.
Summary
Developed and implemented CFO, SCO, and timing offset correction algorithms on a Virtex-7 FPGA for OFDM link optimization.
Linux, Windows.
C/C++, Verilog, Python, Bash Scripting.
Vivado, ModelSim, Cadence Virtuoso, Cadence Genus, Cadence Innovus, Synopsys HSpice, Synopsys Design Compiler, PROLEAD, Yosys, VTR, Git.
MATLAB, Atmel Studio, Visual Studio Code, TensorFlow.
FPGA Programming, AVR Programming, Soldering, Laboratory Equipment.
Native
Fluent
Proficient
Associate Professor, University of Kurdistan, Department of Electrical Engineering, Sanandaj, Kurdistan, Iran, Postal Code 90210. Email: h.jahanirad@uok.ac.ir.
Full Professor, Chair for Implementation Security, Department of Computer Science, Technical University of Darmstadt, 64293 Darmstadt, Germany. Email: amir.moradi@tu-darmstadt.de.
Full Professor, University of Kurdistan, Department of Electrical Engineering, Sanandaj, Kurdistan, Iran, Postal Code 90210. Email: m.razaghi@uok.ac.ir.